KTM-MS98
Amlogic T982 development board for video-wall and HDMI-in signage. LVDS and V-by-One display outputs with a 4K HDMI input, on a compact 110 × 100 mm board.
Flashing, the firmware API and the guides apply to every board. This page covers what is specific to the KTM-MS98: its connectors, pin assignments and electrical limits.
Connector map
Swipe sideways to see the whole board. Tap a connector to jump to its pin definition. Positions are schematic, not to scale.
Specification
| OS | Android 11 |
| CPU | Amlogic T982, dual-core ARM Cortex-A55 |
| GPU | ARM Mali-G52 MP2 (2EE) |
| DDR | LPDDR4 4 GB |
| Flash | eMMC 5.0, 32 GB (16 GB / 64 GB / 128 GB optional) |
| Wi-Fi / BT | 802.11 a/b/g/n/ac, dual 2.4 / 5 GHz + BT |
| Ethernet | RJ45 gigabit (1000 M) |
| Screen interface | LVDS, V-by-One |
| HDMI | HDMI in (4K) |
| RTC | Yes — with scheduled power on/off |
| Audio / Mic | 3.5 mm earphone and microphone |
| Camera | Via USB |
Power: DC 12 V / 3 A via 5.5 × 2.1 mm barrel (current depends on screen size).
Internal expansion: LVDS, V-by-One, RS232, RS485, 3 × USB, speaker, microphone, LED/IR, GPIO and I2C headers.
Board dimensions
| Size | 110 mm × 100 mm |
| Thickness | 10 mm |
| Top clearance | 1.6 mm |
| Bottom clearance | 2.5 mm |
Serial ports at a glance
The RS232 header and the RS485 header are driven through the standard serial
interface. The datasheet does not give a /dev/ttyS* node for them.
| Port | Device node | Type |
|---|---|---|
| RS232 | — | RS232, full duplex |
| RS485 | — | RS485, half duplex |
The RS232/RS485 device nodes are not specified in the datasheet. Confirm on your
board with ls /dev/ttyS* or contact us. See the
firmware API overview for how the device API drives the board
(power scheduling, GPIO, display, network, kiosk lockdown).
Display ports
3.1 LVDS port — dual-contact 36-pin, 2.0 mm
| Pin | Define | Attribute | Description |
|---|---|---|---|
| 1 | 5V | Power out | 3.3V / 5V / 12V optional |
| 2 | 12V | Power out | 3.3V / 5V / 12V optional |
| 3 | 3.3V | Power out | 3.3V / 5V / 12V optional |
| 4 | GND | GND | Ground |
| 5 | GND | GND | Ground |
| 6 | GND | GND | Ground |
| 7 | D0N | Output | Pixel 0 negative data (odd) |
| 8 | D0P | Output | Pixel 0 positive data (odd) |
| 9 | D1N | Output | Pixel 1 negative data (odd) |
| 10 | D1P | Output | Pixel 1 positive data (odd) |
| 11 | D2N | Output | Pixel 2 negative data (odd) |
| 12 | D2P | Output | Pixel 2 positive data (odd) |
| 13 | GND | GND | Ground |
| 14 | GND | GND | Ground |
| 15 | CLK0N | Output | Negative sampling clock (odd) |
| 16 | CLK0P | Output | Positive sampling clock (odd) |
| 17 | D3N | Output | Pixel 3 negative data (odd) |
| 18 | D3P | Output | Pixel 3 positive data (odd) |
| 19 | D5N | Output | Pixel 0 negative data (even) |
| 20 | D5P | Output | Pixel 0 positive data (even) |
| 21 | D6N | Output | Pixel 1 negative data (even) |
| 22 | D6P | Output | Pixel 1 positive data (even) |
| 23 | D7N | Output | Pixel 2 negative data (even) |
| 24 | D7P | Output | Pixel 2 positive data (even) |
| 25 | GND | GND | Ground |
| 26 | GND | GND | Ground |
| 27 | CLK1N | Output | Negative sampling clock (even) |
| 28 | CLK1P | Output | Positive sampling clock (even) |
| 29 | D8N | Output | Pixel 3 negative data (even) |
| 30 | D8P | Output | Pixel 3 positive data (even) |
| 31 | D9N | Output | Pixel 0 negative data (even) |
| 32 | D9P | Output | Pixel 0 positive data (even) |
| 33 | D10N | Output | Pixel 1 negative data (even) |
| 34 | D10P | Output | Pixel 1 positive data (even) |
| 35 | GND | GND | Ground |
| 36 | GND | GND | Ground |
3.4 V-by-One port — 51-pin, 0.5 mm
| Pin | Define | Attribute | Description |
|---|---|---|---|
| 1 | GND | GND | Ground |
| 2 | VBX1-7P | Difference data | Channel 7 |
| 3 | VBX1-7N | Difference data | Channel 7 |
| 4 | GND | GND | Ground |
| 5 | VBX1-6P | Difference data | Channel 6 |
| 6 | VBX1-6N | Difference data | Channel 6 |
| 7 | GND | GND | Ground |
| 8 | VBX1-5P | Difference data | Channel 5 |
| 9 | VBX1-5N | Difference data | Channel 5 |
| 10 | GND | GND | Ground |
| 11 | VBX1-4P | Difference data | Channel 4 |
| 12 | VBX1-4N | Difference data | Channel 4 |
| 13 | GND | GND | Ground |
| 14 | VBX1-3P | Difference data | Channel 3 |
| 15 | VBX1-3N | Difference data | Channel 3 |
| 16 | GND | GND | Ground |
| 17 | VBX1-2P | Difference data | Channel 2 |
| 18 | VBX1-2N | Difference data | Channel 2 |
| 19 | GND | GND | Ground |
| 20 | VBX1-1P | Difference data | Channel 1 |
| 21 | VBX1-1N | Difference data | Channel 1 |
| 22 | GND | GND | Ground |
| 23 | VBX1-0P | Difference data | Channel 0 |
| 24 | VBX1-0N | Difference data | Channel 0 |
| 25 | GND | GND | Ground |
| 26 | VB-LOCKN | LOCKN | Negative sampling clock |
| 27 | VB-HTPDN | HTPDN | HTPDN |
| 28/29 | NC | NC | NC |
| 30 | SEL_SECTIO | SEL_SECTIO | Data |
| 31/32 | NC | NC | NC |
| 33 | I2CM_C_SCL | I2CM_C_SCL | Data |
| 34 | I2CM_C_SDA | I2CM_C_SDA | Data |
| 35 | NC | NC | NC |
| 36 | BLON | BLON | BL- data |
| 37 | E-PWM_H | E-PWM_H | PWM- data |
| 38–42 | GND | GND | Ground |
| 43 | NC | NC | NC |
| 44–51 | V-by-One VCC | VCC-12V | VCC-12V |
Backlight and display power
3.2 LVDS power port — 6-pin, 2.0 mm
Selects the LVDS panel supply voltage by jumper.
| Pin | Define | Attribute | Description |
|---|---|---|---|
| 1 | 3.3V | LVDS VCC | 3.3V |
| 2 | VCC-LVDS | LVDS VCC | 3.3V |
| 3 | 5V | LVDS VCC | 5V |
| 4 | VCC-LVDS | LVDS VCC | 5V |
| 5 | 12V | LVDS VCC | 12V |
| 6 | VCC-LVDS | LVDS VCC | 12V |
3.3 LVDS backlight control port — PH2.0-6P
| Pin | Define | Attribute | Description |
|---|---|---|---|
| 1 | VCC | Power out | 12V |
| 2 | VCC | Power out | 12V |
| 3 | BL-EN | Output | Backlight enable |
| 4 | BL-ADJ | Output | Backlight adjust |
| 5 | GND | GND | Ground |
| 6 | GND | GND | Ground |
Power
3.5 External power port — PH2.54-4P
| Pin | Define | Attribute | Description |
|---|---|---|---|
| 1 | 12V | Power in | 12V |
| 2 | 12V | Power in | 12V |
| 3 | GND | GND | Ground |
| 4 | GND | GND | Ground |